The following disclosure relates to semiconductor devices.
In integrated circuit design there are many applications that include high performance, on-chip capacitors. These applications include, for example, voltage control oscillators, phase-lock loops, operational amplifiers, and switching capacitors. On-chip capacitors can be used, e.g., to isolate digital and analog integrated circuits from noise created within an integrated circuit system or to store charge within an integrated circuit system.
Conventional on-chip capacitors can be configured as Metal-Oxide-Metal capacitors (MOMs). Referring to FIG. 1, the construction of a conventional MOM capacitor 100 is illustrated. MOM capacitor 100 includes two nodes 102 and 104 that are formed on conductor layers 106 and 108, respectively. A substrate 110 forms a base for MOM capacitor 100. Conductor layers 106 and 108 are separated by a dielectric 112 (e.g., silicon dioxide). Substrate 110 and conductor layer 108 can also be separated by a dielectric (not shown). In addition to a device (parallel plate) capacitance (Cpp) that is formed between nodes 102 and 104, an undesirable parasitic capacitance (Cs) may also be formed between substrate 110 and node 104 in a conventional MOM structure.